models name | Orig vs PP valid | PP vs Lustre valid | Orig vs PP simulation failed | lustrec to C code failed | PP vs Lustre simulation failed | C binary failed | PP to Lustre generation failed | is unsupported | Orig vs PP CEX path | lustre file path | PP vs Lustre CEX path | models path | IR path |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Clock_TestGen1.slx | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | Clock_TestGen1_PP.LUSTREC.lus | Clock_TestGen1.slx | IR_pp_Clock_TestGen1_PP.json | ||
Clock_TestGen2.slx | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | Clock_TestGen2_PP.LUSTREC.lus | Clock_TestGen2.slx | IR_pp_Clock_TestGen2_PP.json | ||
Clock_TestGen4.slx | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | Clock_TestGen4_PP.LUSTREC.lus | Clock_TestGen4.slx | IR_pp_Clock_TestGen4_PP.json | ||
Clock.slx | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Clock_PP.LUSTREC.lus | Clock.slx | IR_pp_Clock_PP.json | ||
Clock_TestGen3.slx | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Clock_TestGen3_PP.LUSTREC.lus | Clock_TestGen3.slx | IR_pp_Clock_TestGen3_PP.json |